Ooh, nice diagram, @zranger1!
Yes! This is likely to have a very positive impact on your install! Props to Wizard for guessing this might be the case on a call we had yesterday, and sorry I just assumed ground was connected at A2-B2 and C2-D2.
Since different LEDs can be drawing different amounts of current (and thus dropping different amounts of voltage along the copper traces, including the ground trace), this means that the reference ground is discontinuous at A2 vs B2. The data line at the first pixel of B2 only knows what is low or high by having something to compare it to, and it compares it to ground.
Let’s say the A segment is supposed to be very bright. While the power rails are perhaps 0 and 5 V right where power is connected, by the time we get to the end of the strip, it might be that ground is actually up at 1 V, and VDD is now down at 4 V. This is probably still enough to power and control that final pixel. The data signal as well will be 1V for a data 0 (relative to the supply’s ground) or 4V for a HIGH (data of 1).
Now let’s pretend that the B segment is supposed to be all off, except for the first pixel right at B2. Since there’s minimal current bing drawn, there’s minimal voltage being dropped along those positive Vdd and negative Ground rails on the strips. The voltage at B2, relative to supply ground, is still very close to 0 and 5 V.
If only the data line is connected, and not the ground, the first pixel’s input at B2 is seeing 1 V for a LOW - that’s a fairly indeterminate value when it’s expecting to compare that input to it’s own 0 V ground.
Start with joining power rails wherever data is being passed as zranger1 suggested, then head to the rest of my list!
@zranger1 I’ve always read this as well, but on the art car, we used a nice scope and saw some strange stuff. Granted it was on 5V SK9822s, and granted, they didn’t have local bypass caps like they should have… but we still saw some strange stuff. In addition to ripple on the rails, we saw high frequency attenuation where the leading edges of the “regenerated” data signals about 300 pixels (75ft) in were looking smoother, like an exponential curve. At other times, we saw overshoot-then-dampen oscillation behavior. We also saw data and clock phase shifts relative to each other. I read that some of this is normal, that some pixels intentionally delay clock so that data is sampled further into the smoothed data state transitions, but it seemed extreme. I wish my S-domain fundamentals were better.
If anyone’s ever come across a practical guide to diagnosing SPI transmission line problems in the 500 KHz - 5 MHz range, I’d love to read up in depth!