Output board APA102 protocol Question


I was looking through the code for the Output Board. I have a couple of questions about how the pixels are sent.

This is line 452, seems to set up the APA102 end frame

//end frame
elements[0] = 0xff;
elements[1] = elements[2] = elements[3] = 0;
bitConverter(dst, channel, elements, 4);

Normally I send 0’s, but you can send 1’s - doesn’t matter, as it’s just to generate extra clock pulses.

You have to send n/2 clock pulses after the last pixel (where n is the number of pixels), to clock the pixel updates to the end of the chain. If you only send 1 end frame, it will only clock 64 pixels - what am I missing?

Usually it doesn’t make a big difference, as the next start frame will clock the pixels through, so as long as you keep updating you don’t notice.

Are the extra clock pulses generated separately?

Regarding SK9822 support, I also saw that the use of a 1’s end frame will not work properly. SK9822 are different from APA102 in that you need to send an all 0’s end frame to latch the new pixel color (which you don’t need for APA102 which latch the change on loading).

Again, you usually don’t notice, as the nest start frame (all 0’s) latches the previous change, so as long as you keep updating, you don’t notice the delay.

I haven’t dug into the code in detail, so maybe I’m not understanding exactly how this was implemented. Can you expand on how this works?